Job Overview:

Our Solution Engineering division develops SoCs for various application segments, using the latest IP products from Arm and other vendors. We are looking for a creative and hard-working SoC Lead Design Engineer to lead the team responsible for the development of the JTAG and Fuse Subsystems! The successful candidate will own the Microarchitectural Specifications, lead other designers and partner with the verification lead/team across multiple process nodes and product families. You will join a team of dedicated engineers, collaborating with multiple other groups inside of Arm to design the scalable and reusable Debug Control and Access IPs!

Responsibilities:

As a lead design engineer with a knowledge of subsystems and SoCs you will be leading an IP development team which owns our reconfigurable Fuse and JTAG Subsystems.
Work with the Architect(s) to understand Subsystem requirements, and develop the design specifications which meet the quality, reliability, manufacturing and reconfigurable needs across multiple SoC's.
Your key technical responsibilities will include crafting design micro-architecture specifications, developing the RTL, fixing bugs, running design checks and contributing to the generation of implementation constraints.
Your key leadership responsibilities will include technical guidance and mentorship of the design team, engaging with partner teams for collaborative improvements in tools, technologies, methodologies, and capabilities.
Partner with the verification lead to review test plans and help debug design issues in addition to crafting UVM components for IP and SoC integration of the Subsystems
As lead of the design team, you will drive unification and efficient methods, as well as drive new methodologies used by the team
Act as 1-Arm ensuring the best solutions are what Arm uses.
Required to work with Project Management to define plans and execute schedules flawlessly.

Required Skills and Experience:

In addition to bringing your accomplishment of either Bachelors or Master's degree in Computer Science or Electrical/Computer Engineering or a similar related field and 15+ years' experience working in design of complex subsystems or SoCs, you will need:

Experience in digital hardware design for complex systems using System Verilog.
Experience with working with analog hard IP integration, timing diagrams, BMODs
Experience with reconfigurable IP / Subsystem design
Experience with power and clock domain crossing
Experience with static design checks like linting, CDC/RDC, X-propagation
Experience with all stages of design: initial concept, specification, implementation, testing, documentation and support
Experience collaborating with the verification team on design quality closure
Experience with Perl, Python or other scripting language
Leadership, mentoring or coaching experience

"Nice To Have" Skills and Experience:

Experience with ARM-based designs and/or ARM System Architectures
Experience developing designs for OTP/Fuse usage models and JTAG/TAP protocols
Experience with SoC system use cases and debug methodologies
Experience developing and integrating subsystems for PCIe, UCIe, DDR/LPDDR/HBM, Ethernet etc.
Experience with DFT use cases and methodologies: RTL testability, scan insertion, OCC

In Return:

We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together! These behaviors are assessed as part of the hiring process:

- Partner and customer focus
- Teamwork and communication
- Creativity and innovation
- Team and personal development
- Impact and influence
- Deliver on your promises

Our 10x mindset guides how we engineer, collaborate, and grow. Understand what it means and how to reflect 10x in your work: https://careers.arm.com/en/10x-mindset

#LI-MS1

Salary Range:

$241,100-$326,100 per year
We value people as individuals and our dedication is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process.

Accommodations at Arm

At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm.com . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.

Hybrid Working at Arm

Arm's approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team's needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.

Equal Opportunities at Arm

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don't discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

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Staff Fuse/JTAG Design Lead